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author | Slark Xiao <slark_xiao@163.com> | 2022-02-05 14:57:31 +0100 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2022-02-06 13:19:46 +0100 |
commit | 05daa805a86c831ad9692f6f15e1b877c8f10638 (patch) | |
tree | 120e9ff1645e613491301a02ef564e31d028ab80 /drivers/bus | |
parent | bus: mhi: pci_generic: Add mru_default for Foxconn SDX55 (diff) | |
download | linux-05daa805a86c831ad9692f6f15e1b877c8f10638.tar.xz linux-05daa805a86c831ad9692f6f15e1b877c8f10638.zip |
bus: mhi: pci_generic: Add mru_default for Cinterion MV31-W
For default mechanism, product would use default MRU 3500 if
they didn't define it. But for Cinterion MV31-W, there is a known
issue which MRU 3500 would lead to data connection lost.
So we align it with Qualcomm default MRU settings.
Link: https://lore.kernel.org/r/20220119102519.5342-1-slark_xiao@163.com
[mani: Modified the commit message to reflect Cinterion MV31-W and CCed stable]
Fixes: 87693e092bd0 ("bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI")
Cc: stable@vger.kernel.org # v5.14 +
Reviewed-by: Manivannan Sadhasivam <mani@kernel.org>
Signed-off-by: Slark Xiao <slark_xiao@163.com>
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Link: https://lore.kernel.org/r/20220205135731.157871-3-manivannan.sadhasivam@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/bus')
-rw-r--r-- | drivers/bus/mhi/pci_generic.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 74e8fc342cfd..b79895810c52 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -402,6 +402,7 @@ static const struct mhi_pci_dev_info mhi_mv31_info = { .config = &modem_mv31_config, .bar_num = MHI_PCI_DEFAULT_BAR_NUM, .dma_data_width = 32, + .mru_default = 32768, }; static const struct mhi_channel_config mhi_sierra_em919x_channels[] = { |