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| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-03-28 22:39:34 +0200 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-03-29 00:07:38 +0200 |
| commit | 64757876215fcc515403639fa0bd19e8da7ab06b (patch) | |
| tree | d0d9c58d6ea73a50181b62f431a1e517a7816643 /drivers/char/agp/intel-agp.h | |
| parent | agp/intel: map more registers for use by the GTT code (diff) | |
| download | linux-64757876215fcc515403639fa0bd19e8da7ab06b.tar.xz linux-64757876215fcc515403639fa0bd19e8da7ab06b.zip | |
agp/intel: add ValleyView AGP driver
... and bind it right to the PCI id.
Note that there are still a few things to fix here:
- we need to move the tlb flush to a better place in drm/i915.
- we need to check snoop support on vlv and implement it.
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
[danvet: squash follow-on patch and add todo items to commit msg.]
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'drivers/char/agp/intel-agp.h')
| -rw-r--r-- | drivers/char/agp/intel-agp.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/char/agp/intel-agp.h b/drivers/char/agp/intel-agp.h index 5da67f165afa..41d9ee15d465 100644 --- a/drivers/char/agp/intel-agp.h +++ b/drivers/char/agp/intel-agp.h @@ -96,6 +96,7 @@ #define G4x_GMCH_SIZE_VT_2M (G4x_GMCH_SIZE_2M | G4x_GMCH_SIZE_VT_EN) #define GFX_FLSH_CNTL 0x2170 /* 915+ */ +#define GFX_FLSH_CNTL_VLV 0x101008 #define I810_DRAM_CTL 0x3000 #define I810_DRAM_ROW_0 0x00000001 @@ -234,6 +235,8 @@ #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_M_GT2_IG 0x0166 #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_HB 0x0158 /* Server */ #define PCI_DEVICE_ID_INTEL_IVYBRIDGE_S_GT1_IG 0x015A +#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_HB 0x0F00 /* VLV1 */ +#define PCI_DEVICE_ID_INTEL_VALLEYVIEW_IG 0x0F30 int intel_gmch_probe(struct pci_dev *pdev, struct agp_bridge_data *bridge); |