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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-23 11:40:38 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2011-01-11 21:35:41 +0100 |
| commit | c97689d8860f086125e7ff9cd730027a0057ca4f (patch) | |
| tree | 019ab7330af6c975ffba0d7016e0ed6243fbf6b0 /drivers/char/agp/sworks-agp.c | |
| parent | drm/i915: Workaround erratum on i830 for TAIL pointer within last 2 cachelines (diff) | |
| download | linux-c97689d8860f086125e7ff9cd730027a0057ca4f.tar.xz linux-c97689d8860f086125e7ff9cd730027a0057ca4f.zip | |
agp/intel: Flush the chipset write buffers when changing GTT base
Flush the chipset write buffers before and after adjusting the GTT base
register, just in case. We only modify this value upon initialisation
(boot and resume) so there should be no outstanding writes, however
there are always those persistent PGTBL_ER that keep getting reported
upon resume.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'drivers/char/agp/sworks-agp.c')
0 files changed, 0 insertions, 0 deletions