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author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-14 12:34:51 +0100 |
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committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-12-14 12:34:51 +0100 |
commit | 9097eef024db4f1850015e837a84aca0aa40a288 (patch) | |
tree | 0d2cf4b9ca5e1e58aa38c1225338925e675c4a02 /drivers/char/agp | |
parent | drm/i915/ringbuffer: Make IRQ refcnting atomic (diff) | |
parent | agp/intel: Fix missed cached memory flags setting in i965_write_entry() (diff) | |
download | linux-9097eef024db4f1850015e837a84aca0aa40a288.tar.xz linux-9097eef024db4f1850015e837a84aca0aa40a288.zip |
Merge branch 'drm-intel-fixes' into drm-intel-next
Diffstat (limited to 'drivers/char/agp')
-rw-r--r-- | drivers/char/agp/intel-gtt.c | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 326ca2ef06b5..356f73e0d17e 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c @@ -1135,12 +1135,19 @@ static void i9xx_chipset_flush(void) writel(1, intel_private.i9xx_flush_page); } -static void i965_write_entry(dma_addr_t addr, unsigned int entry, +static void i965_write_entry(dma_addr_t addr, + unsigned int entry, unsigned int flags) { + u32 pte_flags; + + pte_flags = I810_PTE_VALID; + if (flags == AGP_USER_CACHED_MEMORY) + pte_flags |= I830_PTE_SYSTEM_CACHED; + /* Shift high bits down */ addr |= (addr >> 28) & 0xf0; - writel(addr | I810_PTE_VALID, intel_private.gtt + entry); + writel(addr | pte_flags, intel_private.gtt + entry); } static bool gen6_check_flags(unsigned int flags) |