diff options
| author | Jesse Barnes <jbarnes@nietzche.virtuousgeek.org> | 2008-02-20 00:39:58 +0100 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2008-02-20 00:39:58 +0100 |
| commit | 0da3ea12fc2607beb67c2d54d0347807ea615573 (patch) | |
| tree | 661fbfd1bd8e81481b45bdaebf72e1c1b00db470 /drivers/char/drm/i915_drv.c | |
| parent | drm: convert drm from nopage to fault. (diff) | |
| download | linux-0da3ea12fc2607beb67c2d54d0347807ea615573.tar.xz linux-0da3ea12fc2607beb67c2d54d0347807ea615573.zip | |
drm/i915: save/restore interrupt state
On resume, if the interrupt state isn't restored correctly, we may end
up with a flood of unexpected or ill-timed interrupts, which could cause
the kernel to disable the interrupt or vblank events to happen at the
wrong time. So save/restore them properly.
Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/i915_drv.c')
| -rw-r--r-- | drivers/char/drm/i915_drv.c | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/char/drm/i915_drv.c b/drivers/char/drm/i915_drv.c index 52e51033d32c..0f525ad536a4 100644 --- a/drivers/char/drm/i915_drv.c +++ b/drivers/char/drm/i915_drv.c @@ -276,6 +276,7 @@ static int i915_suspend(struct drm_device *dev) dev_priv->saveDSPATILEOFF = I915_READ(DSPATILEOFF); } i915_save_palette(dev, PIPE_A); + dev_priv->savePIPEASTAT = I915_READ(I915REG_PIPEASTAT); /* Pipe & plane B info */ dev_priv->savePIPEBCONF = I915_READ(PIPEBCONF); @@ -303,6 +304,7 @@ static int i915_suspend(struct drm_device *dev) dev_priv->saveDSPBTILEOFF = I915_READ(DSPBTILEOFF); } i915_save_palette(dev, PIPE_B); + dev_priv->savePIPEBSTAT = I915_READ(I915REG_PIPEBSTAT); /* CRT state */ dev_priv->saveADPA = I915_READ(ADPA); @@ -329,6 +331,11 @@ static int i915_suspend(struct drm_device *dev) dev_priv->saveFBC_CONTROL2 = I915_READ(FBC_CONTROL2); dev_priv->saveFBC_CONTROL = I915_READ(FBC_CONTROL); + /* Interrupt state */ + dev_priv->saveIIR = I915_READ(I915REG_INT_IDENTITY_R); + dev_priv->saveIER = I915_READ(I915REG_INT_ENABLE_R); + dev_priv->saveIMR = I915_READ(I915REG_INT_MASK_R); + /* VGA state */ dev_priv->saveVCLK_DIVISOR_VGA0 = I915_READ(VCLK_DIVISOR_VGA0); dev_priv->saveVCLK_DIVISOR_VGA1 = I915_READ(VCLK_DIVISOR_VGA1); |