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authorMichel Dänzer <michel@tungstengraphics.com>2006-08-07 12:37:46 +0200
committerDave Airlie <airlied@linux.ie>2006-09-21 21:32:30 +0200
commitae1b1a4816ac11075d338af79a239f4c326d675c (patch)
tree60faac04eb4cf6d08b01d41e33dddd0f8275aad0 /drivers/char/drm/radeon_cp.c
parentdrm: radeon: implement RADEON_PARAM_SCRATCH_OFFSET getparam (diff)
downloadlinux-ae1b1a4816ac11075d338af79a239f4c326d675c.tar.xz
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drm: radeon: fix up bus mastering when writeback is disabled
When writeback isn't used, actually disable it in the hardware. Not doing this might waste bus bandwidth or even cause memory corruption or system crashes on systems that check bus transfers. No such incident has been reported though. Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/radeon_cp.c')
-rw-r--r--drivers/char/drm/radeon_cp.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 5ad43ba7b5aa..3956628b2576 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -1258,6 +1258,13 @@ static void radeon_test_writeback(drm_radeon_private_t * dev_priv)
dev_priv->writeback_works = 0;
DRM_INFO("writeback forced off\n");
}
+
+ if (!dev_priv->writeback_works) {
+ /* Disable writeback to avoid unnecessary bus master transfer */
+ RADEON_WRITE(RADEON_CP_RB_CNTL, RADEON_READ(RADEON_CP_RB_CNTL) |
+ RADEON_RB_NO_UPDATE);
+ RADEON_WRITE(RADEON_SCRATCH_UMSK, 0);
+ }
}
/* Enable or disable PCI-E GART on the chip */