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authorMichel Dänzer <michel@tungstengraphics.com>2006-08-07 12:41:53 +0200
committerDave Airlie <airlied@linux.ie>2006-09-21 21:32:31 +0200
commitb9b603dd1c99a68e65ad51cda25379441df2e17b (patch)
tree7f8c00912a48714072840a2d4345282ae5d25049 /drivers/char/drm/radeon_cp.c
parentdrm: radeon: fix up bus mastering when writeback is disabled (diff)
downloadlinux-b9b603dd1c99a68e65ad51cda25379441df2e17b.tar.xz
linux-b9b603dd1c99a68e65ad51cda25379441df2e17b.zip
drm: radeon: Use RADEON_RB3D_DSTCACHE_CTLSTAT instead of RADEON_RB2D_DSTCACHE_CTLSTAT.
The latter seems to be a read-only mirror of the former. Signed-off-by: Dave Airlie <airlied@linux.ie>
Diffstat (limited to 'drivers/char/drm/radeon_cp.c')
-rw-r--r--drivers/char/drm/radeon_cp.c10
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/char/drm/radeon_cp.c b/drivers/char/drm/radeon_cp.c
index 3956628b2576..45f8044e9a30 100644
--- a/drivers/char/drm/radeon_cp.c
+++ b/drivers/char/drm/radeon_cp.c
@@ -864,13 +864,13 @@ static int radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv)
dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
- tmp = RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT);
- tmp |= RADEON_RB2D_DC_FLUSH_ALL;
- RADEON_WRITE(RADEON_RB2D_DSTCACHE_CTLSTAT, tmp);
+ tmp = RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT);
+ tmp |= RADEON_RB3D_DC_FLUSH_ALL;
+ RADEON_WRITE(RADEON_RB3D_DSTCACHE_CTLSTAT, tmp);
for (i = 0; i < dev_priv->usec_timeout; i++) {
- if (!(RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT)
- & RADEON_RB2D_DC_BUSY)) {
+ if (!(RADEON_READ(RADEON_RB3D_DSTCACHE_CTLSTAT)
+ & RADEON_RB3D_DC_BUSY)) {
return 0;
}
DRM_UDELAY(1);