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| author | Tang Yuantian <Yuantian.Tang@freescale.com> | 2015-01-15 07:03:41 +0100 |
|---|---|---|
| committer | Michael Turquette <mturquette@linaro.org> | 2015-01-20 19:09:12 +0100 |
| commit | 93a17c058f610398739c8b930ff3c83a0c0b0120 (patch) | |
| tree | bdfabfc3da30d61591792629b621a495d488395a /drivers/clk/Kconfig | |
| parent | clock: redefine variable clocks_per_pll as a struct member (diff) | |
| download | linux-93a17c058f610398739c8b930ff3c83a0c0b0120.tar.xz linux-93a17c058f610398739c8b930ff3c83a0c0b0120.zip | |
clk: ppc-corenet: rename driver to clk-qoriq
Freescale introduced new ARM-based socs which using the compatible
clock IP block with PowerPC-based socs'. So this driver can be used
on both platforms.
Updated relevant descriptions and renamed this driver to better
represent its meaning and keep the function of driver untouched.
Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/Kconfig')
| -rw-r--r-- | drivers/clk/Kconfig | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index 975af6a3c20d..1c0832d9475a 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -101,12 +101,12 @@ config COMMON_CLK_AXI_CLKGEN Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx FPGAs. It is commonly used in Analog Devices' reference designs. -config CLK_PPC_CORENET - bool "Clock driver for PowerPC corenet platforms" - depends on PPC_E500MC && OF +config CLK_QORIQ + bool "Clock driver for Freescale QorIQ platforms" + depends on (PPC_E500MC || ARM) && OF ---help--- - This adds the clock driver support for Freescale PowerPC corenet - platforms using common clock framework. + This adds the clock driver support for Freescale QorIQ platforms + using common clock framework. config COMMON_CLK_XGENE bool "Clock driver for APM XGene SoC" |