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| author | Santosh Shilimkar <santosh.shilimkar@ti.com> | 2013-09-26 03:18:14 +0200 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2013-10-08 03:16:30 +0200 |
| commit | 7affe5685c962ed0bc0fadf307400484b2276c89 (patch) | |
| tree | 91022e1e58ea9c7593146e6d053a7ab0cd434303 /drivers/clk/Kconfig | |
| parent | clk: keystone: add Keystone PLL clock driver (diff) | |
| download | linux-7affe5685c962ed0bc0fadf307400484b2276c89.tar.xz linux-7affe5685c962ed0bc0fadf307400484b2276c89.zip | |
clk: keystone: Add gate control clock driver
Add the driver for the clock gate control which uses PSC (Power Sleep
Controller) IP on Keystone 2 based SOCs. It is responsible for enabling and
disabling of the clocks for different IPs present in the SoC.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/Kconfig')
0 files changed, 0 insertions, 0 deletions