diff options
| author | Eddie James <eajames@linux.vnet.ibm.com> | 2018-03-08 21:57:19 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-03-15 19:11:43 +0100 |
| commit | d90c76bb61128ed9022b9418c31c4749764b6cd9 (patch) | |
| tree | 4805e03a5d45838fdae9f51132781a8cfe7f23fd /drivers/clk/clk-aspeed.c | |
| parent | clk: qcom: msm8916: Fix return value check in qcom_apcs_msm8916_clk_probe() (diff) | |
| download | linux-d90c76bb61128ed9022b9418c31c4749764b6cd9.tar.xz linux-d90c76bb61128ed9022b9418c31c4749764b6cd9.zip | |
clk: aspeed: Fix is_enabled for certain clocks
Some of the Aspeed clocks are disabled by setting the relevant bit in
the "clock stop control" register to one, while others are disabled by
setting their bit to zero. The driver already uses a flag per gate to
identify this behavior, but doesn't apply it in the clock is_enabled
function.
Use the existing gate flag to correctly return whether or not a clock
is enabled in the aspeed_clk_is_enabled function.
Signed-off-by: Eddie James <eajames@linux.vnet.ibm.com>
Fixes: 6671507f0fbd ("clk: aspeed: Handle inverse polarity of USB port 1 clock gate")
Reviewed-by: Joel Stanley <joel@jms.id.au>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk-aspeed.c')
| -rw-r--r-- | drivers/clk/clk-aspeed.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/clk-aspeed.c b/drivers/clk/clk-aspeed.c index 9f7f931d6b2f..168777175cd1 100644 --- a/drivers/clk/clk-aspeed.c +++ b/drivers/clk/clk-aspeed.c @@ -259,11 +259,12 @@ static int aspeed_clk_is_enabled(struct clk_hw *hw) { struct aspeed_clk_gate *gate = to_aspeed_clk_gate(hw); u32 clk = BIT(gate->clock_idx); + u32 enval = (gate->flags & CLK_GATE_SET_TO_DISABLE) ? 0 : clk; u32 reg; regmap_read(gate->map, ASPEED_CLK_STOP_CTRL, ®); - return (reg & clk) ? 0 : 1; + return ((reg & clk) == enval) ? 1 : 0; } static const struct clk_ops aspeed_clk_gate_ops = { |