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author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-10-07 01:25:08 +0200 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-10-07 01:25:08 +0200 |
commit | dbeb1a8ff547ffc2db69b44b4445a9eadc025abf (patch) | |
tree | 257446bd5b37fe55ae44880afc4b2da50aa30fbd /drivers/clk/clk-bulk.c | |
parent | Merge tag 'arc-4.14-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/vgu... (diff) | |
parent | clk: samsung: exynos4: Enable VPLL and EPLL clocks for suspend/resume cycle (diff) | |
download | linux-dbeb1a8ff547ffc2db69b44b4445a9eadc025abf.tar.xz linux-dbeb1a8ff547ffc2db69b44b4445a9eadc025abf.zip |
Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux
Pull clk fixes from Stephen Boyd:
- build fix to export the clk_bulk_prepare() symbol
- suspend fix for Samsung Exynos SoCs where we need to keep clks on
across suspend
- two critical clk markings for clks that shouldn't ever turn off on
Rockchip SoCs
- a fix for a copy-paste mistake on Rockchip rk3128 causing some clks
to touch the same bit and trample over one another
* tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux:
clk: samsung: exynos4: Enable VPLL and EPLL clocks for suspend/resume cycle
clk: Export clk_bulk_prepare()
clk: rockchip: add sclk_timer5 as critical clock on rk3128
clk: rockchip: fix up rk3128 pvtm and mipi_24m gate regs error
clk: rockchip: add pclk_pmu as critical clock on rk3128
Diffstat (limited to 'drivers/clk/clk-bulk.c')
-rw-r--r-- | drivers/clk/clk-bulk.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/clk-bulk.c b/drivers/clk/clk-bulk.c index c834f5abfc49..4c10456f8a32 100644 --- a/drivers/clk/clk-bulk.c +++ b/drivers/clk/clk-bulk.c @@ -105,6 +105,7 @@ err: return ret; } +EXPORT_SYMBOL_GPL(clk_bulk_prepare); #endif /* CONFIG_HAVE_CLK_PREPARE */ |