diff options
| author | Heiko Stuebner <heiko@sntech.de> | 2014-05-23 15:02:15 +0200 |
|---|---|---|
| committer | Mike Turquette <mturquette@linaro.org> | 2014-05-23 22:45:47 +0200 |
| commit | 79c6ab509558f9871175c7e4411f857de12cf33b (patch) | |
| tree | dd67f6534ab3be884ec541f710605af688e87c9a /drivers/clk/clk-divider.c | |
| parent | clk: shmobile: Add R8A7740-specific clock support (diff) | |
| download | linux-79c6ab509558f9871175c7e4411f857de12cf33b.tar.xz linux-79c6ab509558f9871175c7e4411f857de12cf33b.zip | |
clk: divider: add CLK_DIVIDER_READ_ONLY flag
From: Heiko Stuebner <heiko@sntech.de>
Similar to muxes which already have a read-only flag there sometimes
exist dividers which should not be changed by the clock framework
but whose value still should be readable.
Therefore add a READ_ONLY flag similar to the mux-one to clk-divider
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
[changed flag bit to BIT(5) as suggested by Tomasz Figa]
Signed-off-by: Thomas Abraham <thomas.ab@samsung.com>
Acked-by: Tomasz Figa <t.figa@samsung.com>
Acked-by: Max Schwarz <max.schwarz@online.de>
Tested-by: Max Schwarz <max.schwarz@online.de>
Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/clk-divider.c')
| -rw-r--r-- | drivers/clk/clk-divider.c | 10 |
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c index b3c83966be18..c9343f5d9918 100644 --- a/drivers/clk/clk-divider.c +++ b/drivers/clk/clk-divider.c @@ -361,6 +361,11 @@ const struct clk_ops clk_divider_ops = { }; EXPORT_SYMBOL_GPL(clk_divider_ops); +const struct clk_ops clk_divider_ro_ops = { + .recalc_rate = clk_divider_recalc_rate, +}; +EXPORT_SYMBOL_GPL(clk_divider_ro_ops); + static struct clk *_register_divider(struct device *dev, const char *name, const char *parent_name, unsigned long flags, void __iomem *reg, u8 shift, u8 width, @@ -386,7 +391,10 @@ static struct clk *_register_divider(struct device *dev, const char *name, } init.name = name; - init.ops = &clk_divider_ops; + if (clk_divider_flags & CLK_DIVIDER_READ_ONLY) + init.ops = &clk_divider_ro_ops; + else + init.ops = &clk_divider_ops; init.flags = flags | CLK_IS_BASIC; init.parent_names = (parent_name ? &parent_name: NULL); init.num_parents = (parent_name ? 1 : 0); |