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| author | John Stultz <john.stultz@linaro.org> | 2013-09-26 21:05:54 +0200 |
|---|---|---|
| committer | John Stultz <john.stultz@linaro.org> | 2013-09-26 21:05:54 +0200 |
| commit | 17deb9c2db01c7813611291d251d8c7dbdfd3c9d (patch) | |
| tree | 6e023c0be7c64de84dd51a671eb09c5c82b56615 /drivers/clk/clk-mux.c | |
| parent | clocksource: vf_pit_timer: Switch to sched_clock_register() (diff) | |
| parent | Merge branch 'fortglx/3.12/time' into fortglx/3.13/time (diff) | |
| download | linux-17deb9c2db01c7813611291d251d8c7dbdfd3c9d.tar.xz linux-17deb9c2db01c7813611291d251d8c7dbdfd3c9d.zip | |
Merge remote-tracking branch 'tip/timers/core' into fordlezcano/3.13/sched-clock64-conversion
Update to tip/timers/core and resolve minor conflict.
Conflicts:
drivers/clocksource/samsung_pwm_timer.c
Signed-off-by: John Stultz <john.stultz@linaro.org>
Diffstat (limited to 'drivers/clk/clk-mux.c')
| -rw-r--r-- | drivers/clk/clk-mux.c | 19 |
1 files changed, 15 insertions, 4 deletions
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c index 614444ca40cd..4f96ff3ba728 100644 --- a/drivers/clk/clk-mux.c +++ b/drivers/clk/clk-mux.c @@ -42,7 +42,7 @@ static u8 clk_mux_get_parent(struct clk_hw *hw) * OTOH, pmd_trace_clk_mux_ck uses a separate bit for each clock, so * val = 0x4 really means "bit 2, index starts at bit 0" */ - val = readl(mux->reg) >> mux->shift; + val = clk_readl(mux->reg) >> mux->shift; val &= mux->mask; if (mux->table) { @@ -89,11 +89,11 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index) if (mux->flags & CLK_MUX_HIWORD_MASK) { val = mux->mask << (mux->shift + 16); } else { - val = readl(mux->reg); + val = clk_readl(mux->reg); val &= ~(mux->mask << mux->shift); } val |= index << mux->shift; - writel(val, mux->reg); + clk_writel(val, mux->reg); if (mux->lock) spin_unlock_irqrestore(mux->lock, flags); @@ -104,9 +104,15 @@ static int clk_mux_set_parent(struct clk_hw *hw, u8 index) const struct clk_ops clk_mux_ops = { .get_parent = clk_mux_get_parent, .set_parent = clk_mux_set_parent, + .determine_rate = __clk_mux_determine_rate, }; EXPORT_SYMBOL_GPL(clk_mux_ops); +const struct clk_ops clk_mux_ro_ops = { + .get_parent = clk_mux_get_parent, +}; +EXPORT_SYMBOL_GPL(clk_mux_ro_ops); + struct clk *clk_register_mux_table(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, void __iomem *reg, u8 shift, u32 mask, @@ -133,7 +139,10 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name, } init.name = name; - init.ops = &clk_mux_ops; + if (clk_mux_flags & CLK_MUX_READ_ONLY) + init.ops = &clk_mux_ro_ops; + else + init.ops = &clk_mux_ops; init.flags = flags | CLK_IS_BASIC; init.parent_names = parent_names; init.num_parents = num_parents; @@ -154,6 +163,7 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name, return clk; } +EXPORT_SYMBOL_GPL(clk_register_mux_table); struct clk *clk_register_mux(struct device *dev, const char *name, const char **parent_names, u8 num_parents, unsigned long flags, @@ -166,3 +176,4 @@ struct clk *clk_register_mux(struct device *dev, const char *name, flags, reg, shift, mask, clk_mux_flags, NULL, lock); } +EXPORT_SYMBOL_GPL(clk_register_mux); |