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authorMichael Turquette <mturquette@baylibre.com>2015-06-20 22:29:48 +0200
committerMichael Turquette <mturquette@baylibre.com>2015-06-20 22:29:48 +0200
commit2cd7b0432888ef2e1f8b54c1c6f8751e1e0e9b5e (patch)
tree8ecab6ac6ef54b4ccc7b93a6a079e72a6ff7d640 /drivers/clk/clk.c
parentMerge branch 'clk-exynos-cpu-clk' into clk-next (diff)
parentclk: tegra: Fix hda2codec_2x clock name for Tegra30 (diff)
downloadlinux-2cd7b0432888ef2e1f8b54c1c6f8751e1e0e9b5e.tar.xz
linux-2cd7b0432888ef2e1f8b54c1c6f8751e1e0e9b5e.zip
Merge tag 'tegra-for-4.2-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into clk-next
clk: tegra: Changes for v4.2-rc1 This contains the EMC clock driver that's been exhaustively reviewed and tested. It also includes a change to the clock core that allows a clock provider to perform low-level reparenting of clocks. This is required by the EMC clock driver because the reparenting needs to be done at a very specific point in time during the EMC frequency switch.
Diffstat (limited to 'drivers/clk/clk.c')
-rw-r--r--drivers/clk/clk.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 059e5d25c9ba..ddb4b541016f 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -1660,6 +1660,14 @@ static void clk_core_reparent(struct clk_core *core,
__clk_recalc_rates(core, POST_RATE_CHANGE);
}
+void clk_hw_reparent(struct clk_hw *hw, struct clk_hw *new_parent)
+{
+ if (!hw)
+ return;
+
+ clk_core_reparent(hw->core, !new_parent ? NULL : new_parent->core);
+}
+
/**
* clk_has_parent - check if a clock is a possible parent for another
* @clk: clock source