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| author | Sjoerd Simons <sjoerd.simons@collabora.co.uk> | 2015-12-22 22:28:02 +0100 |
|---|---|---|
| committer | Michael Turquette <mturquette@baylibre.com> | 2015-12-23 21:57:30 +0100 |
| commit | 84a8c541664b037a4d1fdc3151466b4ec45c37a5 (patch) | |
| tree | 9bdcbc15dc436daa5705d41291b6cbfa1eb4a30d /drivers/clk/clk.c | |
| parent | clk: rockchip: include downstream muxes into fractional dividers (diff) | |
| download | linux-84a8c541664b037a4d1fdc3151466b4ec45c37a5.tar.xz linux-84a8c541664b037a4d1fdc3151466b4ec45c37a5.zip | |
clk: rockchip: Allow the RK3288 SPDIF clocks to change their parent
The clock branches leading to sclk_spdif and sclk_spdif_8ch on RK3288
SoCs only feed those clocks, allow those clocks to change their parents
all the way up the hierarchy.
Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Diffstat (limited to 'drivers/clk/clk.c')
0 files changed, 0 insertions, 0 deletions