diff options
| author | Weiyi Lu <weiyi.lu@mediatek.com> | 2018-03-12 08:03:42 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2018-03-19 22:37:40 +0100 |
| commit | f72595cf441bb534e601c609b687451cc9143f13 (patch) | |
| tree | ef0343f94f85124dcb877ed15ba7d12260bade0f /drivers/clk/clk.c | |
| parent | dt-bindings: clock: add clocks for MT2712 (diff) | |
| download | linux-f72595cf441bb534e601c609b687451cc9143f13.tar.xz linux-f72595cf441bb534e601c609b687451cc9143f13.zip | |
clk: mediatek: update clock driver of MT2712
According to ECO design change,
1. add new clock mux data and change some
2. add new clock gate data and clock factor data
3. change status register offset of infra subsystem
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/clk.c')
0 files changed, 0 insertions, 0 deletions