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authorFabrizio Castro <fabrizio.castro@bp.renesas.com>2018-02-12 18:44:27 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2018-02-20 13:35:20 +0100
commit5ada6bee8c966bf7bdc23512d1571adaeea22f0b (patch)
tree0ec2b1e50e6c053efcbd68d59f6dac608262f6bd /drivers/clk/hisilicon/Makefile
parentclk: renesas: r8a7790: Add rwdt clock (diff)
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clk: renesas: r8a7791/r8a7793: Add rwdt clock
Add "rwdt" clock to r8a7791_mod_clks. Also, since we may need to access the watchdog registers at any time, declare the clock as critical. Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com> Signed-off-by: Ramesh Shanmugasundaram <ramesh.shanmugasundaram@bp.renesas.com> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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