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author | Dongjiu Geng <gengdongjiu@huawei.com> | 2021-03-23 12:29:33 +0100 |
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committer | Stephen Boyd <sboyd@kernel.org> | 2021-06-28 05:14:24 +0200 |
commit | 6c81966107dc0caa5d2ebedbcebb5f10d865064d (patch) | |
tree | bdedb31ad67e91a46f22fc031e901cc58bbadc01 /drivers/clk/hisilicon/clk.c | |
parent | dt-bindings: Document the hi3559a clock bindings (diff) | |
download | linux-6c81966107dc0caa5d2ebedbcebb5f10d865064d.tar.xz linux-6c81966107dc0caa5d2ebedbcebb5f10d865064d.zip |
clk: hisilicon: Add clock driver for hi3559A SoC
Add clock drivers for hi3559A SoC, this driver
controls the SoC registers to supply different
clocks to different IPs in the SoC.
Signed-off-by: Dongjiu Geng <gengdongjiu@huawei.com>
Link: https://lore.kernel.org/r/1616498973-47067-3-git-send-email-gengdongjiu1@gmail.com
[sboyd@kernel.org: Mark arrays static, add __iomem, drop unused array,
avoid kfree of devm memory]
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/hisilicon/clk.c')
-rw-r--r-- | drivers/clk/hisilicon/clk.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/hisilicon/clk.c b/drivers/clk/hisilicon/clk.c index 54d9fdc93599..9361fba7cd4c 100644 --- a/drivers/clk/hisilicon/clk.c +++ b/drivers/clk/hisilicon/clk.c @@ -162,7 +162,7 @@ int hisi_clk_register_mux(const struct hisi_mux_clock *clks, clks[i].num_parents, clks[i].flags, base + clks[i].offset, clks[i].shift, mask, clks[i].mux_flags, - clks[i].table, &hisi_clk_lock); + (u32 *)clks[i].table, &hisi_clk_lock); if (IS_ERR(clk)) { pr_err("%s: failed to register clock %s\n", __func__, clks[i].name); |