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author | Jiancheng Xue <xuejiancheng@hisilicon.com> | 2016-04-23 09:40:28 +0200 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2016-05-06 20:13:29 +0200 |
commit | 25824d52caa8e614b695a7197a8edde19f5b02ad (patch) | |
tree | 5f183fec712cdf5802e858d4112483eaf98f6ec8 /drivers/clk/hisilicon/reset.h | |
parent | Linux 4.6-rc1 (diff) | |
download | linux-25824d52caa8e614b695a7197a8edde19f5b02ad.tar.xz linux-25824d52caa8e614b695a7197a8edde19f5b02ad.zip |
reset: hisilicon: add reset controller driver for hisilicon SOCs
In most of hisilicon SOCs, reset controller and clock provider are
combined together as a block named CRG (Clock and Reset Generator).
This patch mainly implements the reset function.
Signed-off-by: Jiancheng Xue <xuejiancheng@hisilicon.com>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/hisilicon/reset.h')
-rw-r--r-- | drivers/clk/hisilicon/reset.h | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/drivers/clk/hisilicon/reset.h b/drivers/clk/hisilicon/reset.h new file mode 100644 index 000000000000..677d773ed27c --- /dev/null +++ b/drivers/clk/hisilicon/reset.h @@ -0,0 +1,36 @@ +/* + * Copyright (c) 2015 HiSilicon Technologies Co., Ltd. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program. If not, see <http://www.gnu.org/licenses/>. + */ + +#ifndef __HISI_RESET_H +#define __HISI_RESET_H + +struct device_node; +struct hisi_reset_controller; + +#ifdef CONFIG_RESET_CONTROLLER +struct hisi_reset_controller *hisi_reset_init(struct device_node *np); +void hisi_reset_exit(struct hisi_reset_controller *rstc); +#else +static inline hisi_reset_controller *hisi_reset_init(struct device_node *np) +{ + return 0; +} +static inline void hisi_reset_exit(struct hisi_reset_controller *rstc) +{} +#endif + +#endif /* __HISI_RESET_H */ |