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authorFabio Estevam <fabio.estevam@nxp.com>2017-05-15 13:55:05 +0200
committerStephen Boyd <sboyd@codeaurora.org>2017-06-01 09:25:38 +0200
commitad14972422899b620fb594789824f0871dfb788c (patch)
tree949897fde1a7c049d9fd9ec8d2eb4255dcd65a78 /drivers/clk/imx/clk-imx21.c
parentclk: mvebu: armada-38x: add support for 1866MHz variants (diff)
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clk: imx7d: Fix the powerdown bit location of PLL DDR
According to the MX7D Reference Manual the powerdown bit of CCM_ANALOG_PLL_DDRn register is bit 20, so fix it accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Stefan Agner <stefan@agner.ch> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/imx/clk-imx21.c')
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