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| author | Jernej Skrabec <jernej.skrabec@siol.net> | 2018-08-09 18:52:13 +0200 |
|---|---|---|
| committer | Maxime Ripard <maxime.ripard@bootlin.com> | 2018-08-27 09:18:01 +0200 |
| commit | cb54fbd21a8fd97c2a82a069e8c80abdedbeb530 (patch) | |
| tree | 90a2ebc3f6afe2e5b550b65765b8b8cb1adfa5b2 /drivers/clk/imx/clk-imx35.c | |
| parent | clk: sunxi-ng: h6: fix PWM gate/reset offset (diff) | |
| download | linux-cb54fbd21a8fd97c2a82a069e8c80abdedbeb530.tar.xz linux-cb54fbd21a8fd97c2a82a069e8c80abdedbeb530.zip | |
clk: sunxi-ng: Add maximum rate constraint to NM PLLs
On some NM PLLs, frequency can be set above PLL working range.
Add a constraint for maximum supported rate. This way, drivers can
specify which is maximum allowed rate for PLL.
Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'drivers/clk/imx/clk-imx35.c')
0 files changed, 0 insertions, 0 deletions