Merge tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into next/dt

The i.MX device tree changes for 4.4:
 - Add IOMUXC LPSR (Low Power State Retention) device for i.MX7D.
 - Add a few low power mode related devices and touch controller for
   i.MX6UL.
 - Add a number of devices for i.MX7D SDB board support, USB, Dual FEC,
   and eMMC5.0.
 - i.MX6 Boundary Devices updates: relicense under GPLv2/X11, add Okaya
   LCD, touch and wifi support, add new boards Nitrogen6_Lite and
   Nitrogen6_Max.
 - Enable touch screen and NAND Flash controller for a few Vybrid
   devices.
 - Some random and small updates on LS1021A and MXS support.

* tag 'imx-dt-4.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (53 commits)
  ARM: dts: ls1021a: Add quirk for Erratum A009116
  ARM: imx6sx-sdb: Fix typo in regulator enable GPIO property
  ARM: dts: imx6: phyFLEX: fix typo in "pinctrl-names"
  ARM: dts: imx6: change the core clock of spdif
  ARM: dts: vf-colibri: enable NAND flash controller
  ARM: dts: vf610twr: add NAND flash controller peripherial
  ARM: dts: imx: add Boundary Devices Nitrogen6_Lite board
  ARM: dts: imx: add Boundary Devices Nitrogen6_Max board
  ARM: dts: imx6dl-nitrogen6x: change manufacturer to Boundary Devices
  ARM: dts: imx6q-nitrogen6x: change manufacturer to Boundary Devices
  of: Add Boundary Devices Inc. vendor prefix
  ARM: dts: imx6qdl-sabrelite: relicense under GPLv2/X11
  ARM: dts: imx6qdl-nitrogen6x: relicense under GPLv2/X11
  ARM: dts: imx6qdl-nitrogen6x: add wifi wl1271 support
  ARM: dts: imx6dql-nitrogen6x: add touchscreen support
  ARM: dts: imx6qdl-sabrelite: add Okaya LCD panel
  ARM: dts: imx6qdl-nitrogen6x: add Okaya LCD panel
  ARM: dts: vf500-colibri: Add device tree node for touchscreen support
  ARM: dts: i.MX35: fix cpu compatible value
  ARM: dts: i.MX31: fix cpu compatible value
  ...

Signed-off-by: Olof Johansson <olof@lixom.net>

1 files changed, 11 insertions, 1 deletions

diff --git a/drivers/clk/imx/clk-imx6sl.c b/drivers/clk/imx/clk-imx6sl.c
index a0d4cf26cfa9..1be6230a07af 100644
--- a/drivers/clk/imx/clk-imx6sl.c
+++ b/drivers/clk/imx/clk-imx6sl.c
@@ -97,6 +97,7 @@ static struct clk_div_table video_div_table[] = {
 static unsigned int share_count_ssi1;
 static unsigned int share_count_ssi2;
 static unsigned int share_count_ssi3;
+static unsigned int share_count_spdif;
 
 static struct clk *clks[IMX6SL_CLK_END];
 static struct clk_onecell_data clk_data;
@@ -184,6 +185,12 @@ void imx6sl_set_wait_clk(bool enter)
 		imx6sl_enable_pll_arm(false);
 }
 
+static struct clk ** const uart_clks[] __initconst = {
+	&clks[IMX6SL_CLK_UART],
+	&clks[IMX6SL_CLK_UART_SERIAL],
+	NULL
+};
+
 static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 {
 	struct device_node *np;
@@ -391,7 +398,8 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 	clks[IMX6SL_CLK_PWM4]         = imx_clk_gate2("pwm4",         "perclk",            base + 0x78, 22);
 	clks[IMX6SL_CLK_SDMA]         = imx_clk_gate2("sdma",         "ipg",               base + 0x7c, 6);
 	clks[IMX6SL_CLK_SPBA]         = imx_clk_gate2("spba",         "ipg",               base + 0x7c, 12);
-	clks[IMX6SL_CLK_SPDIF]        = imx_clk_gate2("spdif",        "spdif0_podf",       base + 0x7c, 14);
+	clks[IMX6SL_CLK_SPDIF]        = imx_clk_gate2_shared("spdif",     "spdif0_podf",   base + 0x7c, 14, &share_count_spdif);
+	clks[IMX6SL_CLK_SPDIF_GCLK]   = imx_clk_gate2_shared("spdif_gclk",  "ipg",         base + 0x7c, 14, &share_count_spdif);
 	clks[IMX6SL_CLK_SSI1_IPG]     = imx_clk_gate2_shared("ssi1_ipg",     "ipg",        base + 0x7c, 18, &share_count_ssi1);
 	clks[IMX6SL_CLK_SSI2_IPG]     = imx_clk_gate2_shared("ssi2_ipg",     "ipg",        base + 0x7c, 20, &share_count_ssi2);
 	clks[IMX6SL_CLK_SSI3_IPG]     = imx_clk_gate2_shared("ssi3_ipg",     "ipg",        base + 0x7c, 22, &share_count_ssi3);
@@ -439,5 +447,7 @@ static void __init imx6sl_clocks_init(struct device_node *ccm_node)
 
 	clk_set_parent(clks[IMX6SL_CLK_LCDIF_AXI_SEL],
 		       clks[IMX6SL_CLK_PLL2_PFD2]);
+
+	imx_register_uart_clocks(uart_clks);
 }
 CLK_OF_DECLARE(imx6sl, "fsl,imx6sl-ccm", imx6sl_clocks_init);