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author | Anson Huang <Anson.Huang@nxp.com> | 2019-06-19 07:52:44 +0200 |
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committer | Shawn Guo <shawnguo@kernel.org> | 2019-08-03 09:16:01 +0200 |
commit | 34af5179d239e42698e2aff0be94de2aeac9a733 (patch) | |
tree | b52f077ddac5545125c501d96496fefc378e1b22 /drivers/clk/imx/clk-imx8mm.c | |
parent | dt-bindings: imx: Add clock binding doc for i.MX8MN (diff) | |
download | linux-34af5179d239e42698e2aff0be94de2aeac9a733.tar.xz linux-34af5179d239e42698e2aff0be94de2aeac9a733.zip |
clk: imx8mm: Make 1416X/1443X PLL macro definitions common for usage
1416X/1443X PLL are used on i.MX8MM and i.MX8MN and maybe
other i.MX8M series SoC later, the macro definitions of
these PLLs' initialization should be common for usage.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk-imx8mm.c')
-rw-r--r-- | drivers/clk/imx/clk-imx8mm.c | 17 |
1 files changed, 0 insertions, 17 deletions
diff --git a/drivers/clk/imx/clk-imx8mm.c b/drivers/clk/imx/clk-imx8mm.c index 6b8e75df994d..43fa9c361fcb 100644 --- a/drivers/clk/imx/clk-imx8mm.c +++ b/drivers/clk/imx/clk-imx8mm.c @@ -26,23 +26,6 @@ static u32 share_count_dcss; static u32 share_count_pdm; static u32 share_count_nand; -#define PLL_1416X_RATE(_rate, _m, _p, _s) \ - { \ - .rate = (_rate), \ - .mdiv = (_m), \ - .pdiv = (_p), \ - .sdiv = (_s), \ - } - -#define PLL_1443X_RATE(_rate, _m, _p, _s, _k) \ - { \ - .rate = (_rate), \ - .mdiv = (_m), \ - .pdiv = (_p), \ - .sdiv = (_s), \ - .kdiv = (_k), \ - } - static const struct imx_pll14xx_rate_table imx8mm_pll1416x_tbl[] = { PLL_1416X_RATE(1800000000U, 225, 3, 0), PLL_1416X_RATE(1600000000U, 200, 3, 0), |