diff options
| author | Abel Vesa <abel.vesa@nxp.com> | 2020-04-15 10:02:45 +0200 |
|---|---|---|
| committer | Shawn Guo <shawnguo@kernel.org> | 2020-04-29 04:00:05 +0200 |
| commit | 1e54afe9fcfe99cf913526cbcb0128e4a91d0621 (patch) | |
| tree | ba1c648c0bde40d28729c4b7bbbeea975f70e0c7 /drivers/clk/imx/clk.h | |
| parent | clk: imx: clk-pllv3: Use readl_relaxed_poll_timeout() for PLL lock wait (diff) | |
| download | linux-1e54afe9fcfe99cf913526cbcb0128e4a91d0621.tar.xz linux-1e54afe9fcfe99cf913526cbcb0128e4a91d0621.zip | |
clk: imx: gate2: Allow single bit gating clock
Audiomix on i.MX8MP registers two gates that share the same enable count
but use the same bit to control the gate instead of two bits. By adding
the flag IMX_CLK_GATE2_SINGLE_BIT we allow the gate2 to use the generic
gate ops for enable, disable and is_enabled.
For the disable_unused, nothing happens if this flag is specified.
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Reviewed-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Diffstat (limited to 'drivers/clk/imx/clk.h')
| -rw-r--r-- | drivers/clk/imx/clk.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/drivers/clk/imx/clk.h b/drivers/clk/imx/clk.h index f074dd8ec42e..01ff1dbfbdef 100644 --- a/drivers/clk/imx/clk.h +++ b/drivers/clk/imx/clk.h @@ -5,6 +5,8 @@ #include <linux/spinlock.h> #include <linux/clk-provider.h> +#define IMX_CLK_GATE2_SINGLE_BIT 1 + extern spinlock_t imx_ccm_lock; void imx_check_clocks(struct clk *clks[], unsigned int count); @@ -355,6 +357,17 @@ static inline struct clk_hw *imx_clk_hw_gate2_shared2(const char *name, &imx_ccm_lock, share_count); } +static inline struct clk_hw *imx_dev_clk_hw_gate_shared(struct device *dev, + const char *name, const char *parent, + void __iomem *reg, u8 shift, + unsigned int *share_count) +{ + return clk_hw_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT | + CLK_OPS_PARENT_ENABLE, reg, shift, 0x3, + IMX_CLK_GATE2_SINGLE_BIT, + &imx_ccm_lock, share_count); +} + static inline struct clk *imx_clk_gate2_cgr(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 cgr_val) { |