diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-03-04 13:52:50 +0100 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@nxp.com> | 2022-03-04 16:06:30 +0100 |
| commit | d77461a616b659bd88dc153e3a86dba5bf78aa8a (patch) | |
| tree | 89d522b125f96e75d3e462a0076115a38720e4ce /drivers/clk/imx | |
| parent | clk: imx: pll14xx: Use register defines consistently (diff) | |
| download | linux-d77461a616b659bd88dc153e3a86dba5bf78aa8a.tar.xz linux-d77461a616b659bd88dc153e3a86dba5bf78aa8a.zip | |
clk: imx: pll14xx: Drop wrong shifting
The code tries to mask the bits in SDIV_MASK from 'tmp'. SDIV_MASK
already contains the shifted value, so shifting it again is wrong.
No functional change though as SDIV_SHIFT is zero.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
Link: https://lore.kernel.org/r/20220304125256.2125023-3-s.hauer@pengutronix.de
Signed-off-by: Abel Vesa <abel.vesa@nxp.com>
Diffstat (limited to 'drivers/clk/imx')
| -rw-r--r-- | drivers/clk/imx/clk-pll14xx.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c index cae64d750672..b295d8a04900 100644 --- a/drivers/clk/imx/clk-pll14xx.c +++ b/drivers/clk/imx/clk-pll14xx.c @@ -195,7 +195,7 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate, tmp = readl_relaxed(pll->base + DIV_CTL0); if (!clk_pll14xx_mp_change(rate, tmp)) { - tmp &= ~(SDIV_MASK) << SDIV_SHIFT; + tmp &= ~SDIV_MASK; tmp |= rate->sdiv << SDIV_SHIFT; writel_relaxed(tmp, pll->base + DIV_CTL0); @@ -261,7 +261,7 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate, tmp = readl_relaxed(pll->base + DIV_CTL0); if (!clk_pll14xx_mp_change(rate, tmp)) { - tmp &= ~(SDIV_MASK) << SDIV_SHIFT; + tmp &= ~SDIV_MASK; tmp |= rate->sdiv << SDIV_SHIFT; writel_relaxed(tmp, pll->base + DIV_CTL0); |