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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-04-23 10:35:40 +0200 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-05-06 07:50:33 +0200 |
commit | d633fb7ac1e6abc39270edebbfa23131c673b5b9 (patch) | |
tree | 1054684c80836aab5786914e3bf13a10191e1dda /drivers/clk/mediatek/Makefile | |
parent | clk: mediatek: Add initial common clock support for Mediatek SoCs. (diff) | |
download | linux-d633fb7ac1e6abc39270edebbfa23131c673b5b9.tar.xz linux-d633fb7ac1e6abc39270edebbfa23131c673b5b9.zip |
clk: mediatek: Add reset controller support
The pericfg and infracfg units also provide reset lines to several
other SoC internal units. This adds a function which can be called
from the pericfg and infracfg initialization functions which will
register the reset controller using reset_controller_register. The
reset controller will provide support for resetting the units
connected to the pericfg and infracfg controller. The units resetted
by this controller can use the standard reset device tree binding
to gain access to the reset lines.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/mediatek/Makefile')
-rw-r--r-- | drivers/clk/mediatek/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile index c384e9778d1a..0b6f1c3c9c69 100644 --- a/drivers/clk/mediatek/Makefile +++ b/drivers/clk/mediatek/Makefile @@ -1 +1,2 @@ obj-y += clk-mtk.o clk-pll.o clk-gate.o +obj-$(CONFIG_RESET_CONTROLLER) += reset.o |