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authorMichael Turquette <mturquette@baylibre.com>2016-04-28 21:00:52 +0200
committerMichael Turquette <mturquette@baylibre.com>2016-06-23 03:02:24 +0200
commite92f7cca446ec503251b58ad9a8b5592a2d927de (patch)
tree139c4559a63d9b35fbadbf78de8ebf4376aeeb45 /drivers/clk/meson/clkc.h
parentclk: meson8b: rectify reg offsets with datasheet (diff)
downloadlinux-e92f7cca446ec503251b58ad9a8b5592a2d927de.tar.xz
linux-e92f7cca446ec503251b58ad9a8b5592a2d927de.zip
clk: meson8b: clean up fixed rate clocks
Remove the fixed_rate registration function and helpers from clkc.[ch]. Replace unnecessary configuration struct with static initialization of the desired clock type. While we're here, begin the transition to a proper platform_driver and call of_clk_add_hw_provider with a shiny new struct clk_hw_onecell_data. Tested-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Diffstat (limited to 'drivers/clk/meson/clkc.h')
-rw-r--r--drivers/clk/meson/clkc.h26
1 files changed, 0 insertions, 26 deletions
diff --git a/drivers/clk/meson/clkc.h b/drivers/clk/meson/clkc.h
index 609ae92cc13f..b23b057d86e1 100644
--- a/drivers/clk/meson/clkc.h
+++ b/drivers/clk/meson/clkc.h
@@ -69,11 +69,6 @@ struct fixed_fact_conf {
struct parm mult_parm;
};
-struct fixed_rate_conf {
- unsigned long rate;
- struct parm rate_parm;
-};
-
struct composite_conf {
struct parm mux_parm;
struct parm div_parm;
@@ -89,7 +84,6 @@ struct composite_conf {
enum clk_type {
CLK_FIXED_FACTOR,
- CLK_FIXED_RATE,
CLK_COMPOSITE,
CLK_CPU,
CLK_PLL,
@@ -105,32 +99,12 @@ struct clk_conf {
unsigned long flags;
union {
struct fixed_fact_conf fixed_fact;
- struct fixed_rate_conf fixed_rate;
const struct composite_conf *composite;
struct pll_conf *pll;
const struct clk_div_table *div_table;
} conf;
};
-#define FIXED_RATE_P(_ro, _ci, _cn, _f, _c) \
- { \
- .reg_off = (_ro), \
- .clk_type = CLK_FIXED_RATE, \
- .clk_id = (_ci), \
- .clk_name = (_cn), \
- .flags = (_f), \
- .conf.fixed_rate.rate_parm = _c, \
- } \
-
-#define FIXED_RATE(_ci, _cn, _f, _r) \
- { \
- .clk_type = CLK_FIXED_RATE, \
- .clk_id = (_ci), \
- .clk_name = (_cn), \
- .flags = (_f), \
- .conf.fixed_rate.rate = (_r), \
- } \
-
#define PLL(_ro, _ci, _cn, _cp, _f, _c) \
{ \
.reg_off = (_ro), \