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authorJerome Brunet <jbrunet@baylibre.com>2018-11-08 10:31:23 +0100
committerStephen Boyd <sboyd@kernel.org>2018-11-08 19:21:21 +0100
commitd6ee1e7e9004d3d246cdfa14196989e0a9466c16 (patch)
treef46b733beba54a394e26b21e630954d50b64e991 /drivers/clk/meson/meson-aoclk.h
parentclk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL (diff)
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clk: meson: axg: mark fdiv2 and fdiv3 as critical
Similar to gxbb and gxl platforms, axg SCPI Cortex-M co-processor uses the fdiv2 and fdiv3 to, among other things, provide the cpu clock. Until clock hand-off mechanism makes its way to CCF and the generic SCPI claims platform specific clocks, these clocks must be marked as critical to make sure they are never disabled when needed by the co-processor. Fixes: 05f814402d61 ("clk: meson: add fdiv clock gates") Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/meson/meson-aoclk.h')
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