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authorNeil Armstrong <narmstrong@baylibre.com>2019-03-04 11:53:58 +0100
committerNeil Armstrong <narmstrong@baylibre.com>2019-03-19 21:10:21 +0100
commitdc6276f57617344c9e78332c682ea1e982527e09 (patch)
tree0d7a0946f0c5052006c55f18e02400f59a2117dc /drivers/clk/meson
parentclk: meson-g12a: add cpu clock bindings (diff)
downloadlinux-dc6276f57617344c9e78332c682ea1e982527e09.tar.xz
linux-dc6276f57617344c9e78332c682ea1e982527e09.zip
clk: g12a-aoclk: re-export CLKID_AO_SAR_ADC_SEL clock id
When submitted v2 of the G12A AO-CLK IDs, the SAR_ADC_SEL ID was moved to the internal non-exported bindings, but this clock is necessary and mandatory for the SAR ADC bindings. Export it back to the public bindings. Fixes: be3d960b0aeb ("dt-bindings: clk: add G12A AO Clock and Reset Bindings") Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Jerome Brunet <jbrunet@baylibre.com> Link: https://lkml.kernel.org/r/20190304105358.4987-1-narmstrong@baylibre.com
Diffstat (limited to 'drivers/clk/meson')
-rw-r--r--drivers/clk/meson/g12a-aoclk.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clk/meson/g12a-aoclk.h b/drivers/clk/meson/g12a-aoclk.h
index 04b0d5506641..666b4493822c 100644
--- a/drivers/clk/meson/g12a-aoclk.h
+++ b/drivers/clk/meson/g12a-aoclk.h
@@ -16,7 +16,6 @@
* to expose, such as the internal muxes and dividers of composite clocks,
* will remain defined here.
*/
-#define CLKID_AO_SAR_ADC_SEL 16
#define CLKID_AO_SAR_ADC_DIV 17
#define CLKID_AO_CTS_OSCIN 19
#define CLKID_AO_32K_PRE 20