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authorRobert Jarzmik <robert.jarzmik@free.fr>2014-10-07 01:07:57 +0200
committerMichael Turquette <mturquette@linaro.org>2014-11-17 20:25:29 +0100
commitdcf3d458304aafda3d12413ade39fdf19740dbc3 (patch)
treef6ac3ddde17edac558d5ab760d2052831d131259 /drivers/clk/pxa/clk-pxa27x.c
parentclk-divider: Fix READ_ONLY when divider > 1 (diff)
downloadlinux-dcf3d458304aafda3d12413ade39fdf19740dbc3.tar.xz
linux-dcf3d458304aafda3d12413ade39fdf19740dbc3.zip
clk: pxa: fix pxa27x CCCR bit usage
Trivial fix to check the A bit of CCCR for memory frequency calculations, where the shift of the bit index was missing, triggering a wrong calculation of memory frequency. Signed-off-by: Robert Jarzmik <robert.jarzmik@free.fr> Signed-off-by: Michael Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/pxa/clk-pxa27x.c')
-rw-r--r--drivers/clk/pxa/clk-pxa27x.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/pxa/clk-pxa27x.c b/drivers/clk/pxa/clk-pxa27x.c
index b345cc791e5d..88b9fe13fa44 100644
--- a/drivers/clk/pxa/clk-pxa27x.c
+++ b/drivers/clk/pxa/clk-pxa27x.c
@@ -322,7 +322,7 @@ static unsigned long clk_pxa27x_memory_get_rate(struct clk_hw *hw,
unsigned long ccsr = CCSR;
osc_forced = ccsr & (1 << CCCR_CPDIS_BIT);
- a = cccr & CCCR_A_BIT;
+ a = cccr & (1 << CCCR_A_BIT);
l = ccsr & CCSR_L_MASK;
if (osc_forced || a)
@@ -341,7 +341,7 @@ static u8 clk_pxa27x_memory_get_parent(struct clk_hw *hw)
unsigned long ccsr = CCSR;
osc_forced = ccsr & (1 << CCCR_CPDIS_BIT);
- a = cccr & CCCR_A_BIT;
+ a = cccr & (1 << CCCR_A_BIT);
if (osc_forced)
return PXA_MEM_13Mhz;
if (a)