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author | Stephen Boyd <sboyd@codeaurora.org> | 2015-08-06 12:37:42 +0200 |
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committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-09-17 00:22:35 +0200 |
commit | 45dd0e55317ccb27fe8eae639275c2b3a2fb52e5 (patch) | |
tree | 6447319b8acb748a2ab66ab10c4c781af2cbb264 /drivers/clk/qcom/Makefile | |
parent | clk: divider: handle integer overflow when dividing large clock rates (diff) | |
download | linux-45dd0e55317ccb27fe8eae639275c2b3a2fb52e5.tar.xz linux-45dd0e55317ccb27fe8eae639275c2b3a2fb52e5.zip |
clk: qcom: Add support for GDSCs
GDSCs (Global Distributed Switch Controllers) are responsible for
safely collapsing and restoring power to peripherals in the SoC.
These are best modelled as power domains using genpd and given
the registers are scattered throughout the clock controller register
space, its best to have the support added through the clock driver.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/Makefile')
-rw-r--r-- | drivers/clk/qcom/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile index 50b337a24a87..fe6252349e55 100644 --- a/drivers/clk/qcom/Makefile +++ b/drivers/clk/qcom/Makefile @@ -9,6 +9,7 @@ clk-qcom-y += clk-branch.o clk-qcom-y += clk-regmap-divider.o clk-qcom-y += clk-regmap-mux.o clk-qcom-y += reset.o +clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o |