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authorSivaprakash Murugesan <sivaprak@codeaurora.org>2020-06-22 06:28:10 +0200
committerStephen Boyd <sboyd@kernel.org>2020-06-22 09:21:59 +0200
commitecd2bacfbbc4d7a2a1beb96fa7836a8ca6e4cf71 (patch)
treea043a4ac0ac6c250193bdb884e11972ea4048e95 /drivers/clk/qcom/Makefile
parentdt-bindings: clock: add ipq6018 a53 pll compatible (diff)
downloadlinux-ecd2bacfbbc4d7a2a1beb96fa7836a8ca6e4cf71.tar.xz
linux-ecd2bacfbbc4d7a2a1beb96fa7836a8ca6e4cf71.zip
clk: qcom: Add ipq apss pll driver
The CPUs on Qualcomm ipq based devices are clocked by an alpha PLL. Add support for the apss pll found on ipq based devices which can support CPU frequencies above 1Ghz. Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org> Link: https://lore.kernel.org/r/1592800092-20533-3-git-send-email-sivaprak@codeaurora.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/Makefile')
-rw-r--r--drivers/clk/qcom/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 7ec8561a1270..7942c00902ec 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -19,6 +19,7 @@ clk-qcom-$(CONFIG_QCOM_GDSC) += gdsc.o
# Keep alphabetically sorted by config
obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o
obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
+obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o
obj-$(CONFIG_IPQ_GCC_4019) += gcc-ipq4019.o
obj-$(CONFIG_IPQ_GCC_6018) += gcc-ipq6018.o
obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o