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author | Abhishek Sahu <absahu@codeaurora.org> | 2017-12-13 15:25:33 +0100 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-12-22 01:03:22 +0100 |
commit | df964016490b2cf630b1b926a1d5c610833aaa84 (patch) | |
tree | d6d813cc879153ee02e15d478e28ecbfad0a5026 /drivers/clk/qcom/clk-regmap-mux.c | |
parent | clk: qcom: add read-only divider operations (diff) | |
download | linux-df964016490b2cf630b1b926a1d5c610833aaa84.tar.xz linux-df964016490b2cf630b1b926a1d5c610833aaa84.zip |
clk: qcom: add parent map for regmap mux
Currently the driver assumes the register configuration value
is identical to its index in the parent map. This patch adds
the parent map field in regmap mux clock node which contains
the mapping of parent index with actual register configuration
value. If regmap node contains this parent map then the
configuration value will be taken from this
parent map instead of simply writing the index value.
Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/clk-regmap-mux.c')
-rw-r--r-- | drivers/clk/qcom/clk-regmap-mux.c | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/clk/qcom/clk-regmap-mux.c b/drivers/clk/qcom/clk-regmap-mux.c index cae3071f384c..0f3a1bda3e91 100644 --- a/drivers/clk/qcom/clk-regmap-mux.c +++ b/drivers/clk/qcom/clk-regmap-mux.c @@ -35,6 +35,9 @@ static u8 mux_get_parent(struct clk_hw *hw) val >>= mux->shift; val &= mask; + if (mux->parent_map) + return qcom_find_src_index(hw, mux->parent_map, val); + return val; } @@ -45,6 +48,9 @@ static int mux_set_parent(struct clk_hw *hw, u8 index) unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); unsigned int val; + if (mux->parent_map) + index = mux->parent_map[index].cfg; + val = index; val <<= mux->shift; |