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authorRajendra Nayak <rnayak@codeaurora.org>2015-08-06 12:37:45 +0200
committerStephen Boyd <sboyd@codeaurora.org>2015-09-17 00:22:40 +0200
commit3c53f5e2179874441a1741ec7bcbaa92fcec9c79 (patch)
treeaeae5905dbba90978553308f31a7f72cbc5ba129 /drivers/clk/qcom/common.c
parentclk: qcom: gdsc: Add support for Memory RET/OFF (diff)
downloadlinux-3c53f5e2179874441a1741ec7bcbaa92fcec9c79.tar.xz
linux-3c53f5e2179874441a1741ec7bcbaa92fcec9c79.zip
clk: qcom: gdsc: Add support for ON only state
Certain devices can have GDSCs' which support ON as the only state. They can't be power collapsed to either hit RET or OFF. The clients drivers for these GDSCs' however would expect the state of the core to be reset following a GDSC disable and re-enable. To do this assert/deassert reset lines every time the client driver would request the GDSC to be powered on/off instead. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom/common.c')
-rw-r--r--drivers/clk/qcom/common.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/qcom/common.c b/drivers/clk/qcom/common.c
index dc51a63c9625..150692879e92 100644
--- a/drivers/clk/qcom/common.c
+++ b/drivers/clk/qcom/common.c
@@ -125,7 +125,8 @@ int qcom_cc_really_probe(struct platform_device *pdev,
goto err_reset;
if (desc->gdscs && desc->num_gdscs) {
- ret = gdsc_register(dev, desc->gdscs, desc->num_gdscs, regmap);
+ ret = gdsc_register(dev, desc->gdscs, desc->num_gdscs,
+ &reset->rcdev, regmap);
if (ret)
goto err_pd;
}