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| author | Taniya Das <tdas@codeaurora.org> | 2020-07-24 18:07:55 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2020-07-24 22:04:48 +0200 |
| commit | 173722995cdb7c22d21abd484a5001c903df1e20 (patch) | |
| tree | fed0c85756139d4883b5c24564cab0c4775b2d7e /drivers/clk/qcom/gdsc.h | |
| parent | clk: qcom: Export gdsc_gx_do_nothing_enable() to modules (diff) | |
| download | linux-173722995cdb7c22d21abd484a5001c903df1e20.tar.xz linux-173722995cdb7c22d21abd484a5001c903df1e20.zip | |
clk: qcom: gdsc: Add support to enable retention of GSDCR
Add support for the RETAIN_FF_ENABLE feature which enables the
usage of retention registers. These registers maintain their
state after disabling and re-enabling a GDSC.
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Link: https://lore.kernel.org/r/1595606878-2664-2-git-send-email-tdas@codeaurora.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/gdsc.h')
| -rw-r--r-- | drivers/clk/qcom/gdsc.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gdsc.h b/drivers/clk/qcom/gdsc.h index 1896bfb2bbd1..bd537438c793 100644 --- a/drivers/clk/qcom/gdsc.h +++ b/drivers/clk/qcom/gdsc.h @@ -50,6 +50,7 @@ struct gdsc { #define AON_RESET BIT(4) #define POLL_CFG_GDSCR BIT(5) #define ALWAYS_ON BIT(6) +#define RETAIN_FF_ENABLE BIT(7) struct reset_controller_dev *rcdev; unsigned int *resets; unsigned int reset_count; |