diff options
| author | Marijn Suijten <marijn.suijten@somainline.org> | 2021-08-29 22:48:20 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2021-09-14 23:09:48 +0200 |
| commit | 7340264ee49d603c09b4bbcb6a4f0fc7e1f35a84 (patch) | |
| tree | 1b40e94ce457f053cc44c2888aec849ea06f6763 /drivers/clk/qcom/gpucc-sdm660.c | |
| parent | clk: qcom: gcc-sdm660: Use ARRAY_SIZE for num_parents (diff) | |
| download | linux-7340264ee49d603c09b4bbcb6a4f0fc7e1f35a84.tar.xz linux-7340264ee49d603c09b4bbcb6a4f0fc7e1f35a84.zip | |
clk: qcom: gpucc-sdm660: Use ARRAY_SIZE for num_parents
Where possible, use ARRAY_SIZE to determine the number of parents in
clk_parent_data, instead of hardcoding it.
Signed-off-by: Marijn Suijten <marijn.suijten@somainline.org>
Link: https://lore.kernel.org/r/20210829204822.289829-3-marijn.suijten@somainline.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/qcom/gpucc-sdm660.c')
| -rw-r--r-- | drivers/clk/qcom/gpucc-sdm660.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/qcom/gpucc-sdm660.c b/drivers/clk/qcom/gpucc-sdm660.c index 1ebcceb3a50d..bea73ae28b36 100644 --- a/drivers/clk/qcom/gpucc-sdm660.c +++ b/drivers/clk/qcom/gpucc-sdm660.c @@ -114,7 +114,7 @@ static struct clk_rcg2_gfx3d gfx3d_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "gfx3d_clk_src", .parent_data = gpucc_parent_data_1, - .num_parents = 4, + .num_parents = ARRAY_SIZE(gpucc_parent_data_1), .ops = &clk_gfx3d_ops, .flags = CLK_SET_RATE_PARENT | CLK_OPS_PARENT_ENABLE, }, @@ -172,7 +172,7 @@ static struct clk_rcg2 rbbmtimer_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "rbbmtimer_clk_src", .parent_data = gpucc_parent_data_0, - .num_parents = 3, + .num_parents = ARRAY_SIZE(gpucc_parent_data_0), .ops = &clk_rcg2_ops, }, }; @@ -192,7 +192,7 @@ static struct clk_rcg2 rbcpr_clk_src = { .clkr.hw.init = &(struct clk_init_data){ .name = "rbcpr_clk_src", .parent_data = gpucc_parent_data_0, - .num_parents = 3, + .num_parents = ARRAY_SIZE(gpucc_parent_data_0), .ops = &clk_rcg2_ops, }, }; |