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authorSrinivas Kandagatla <srinivas.kandagatla@linaro.org>2016-08-25 13:20:47 +0200
committerStephen Boyd <sboyd@codeaurora.org>2016-08-25 22:02:33 +0200
commit62d157587efa54487c32b3c2ca76979348e0b90a (patch)
tree0a8c60cdee25d85978734467cfb72528ba97a420 /drivers/clk/qcom
parentclk: gcc-msm8996: Fix pcie 2 pipe register offset (diff)
downloadlinux-62d157587efa54487c32b3c2ca76979348e0b90a.tar.xz
linux-62d157587efa54487c32b3c2ca76979348e0b90a.zip
clk: gcc-msm8996: add missing pcie phy reset lines
This patch adds missing 2 PCIE common reset lines. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom')
-rw-r--r--drivers/clk/qcom/gcc-msm8996.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index 2c367711feeb..ebe5d187fa1b 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -3404,6 +3404,8 @@ static const struct qcom_reset_map gcc_msm8996_resets[] = {
[GCC_PCIE_2_BCR] = { 0x6e000 },
[GCC_PCIE_2_PHY_BCR] = { 0x6e038 },
[GCC_PCIE_PHY_BCR] = { 0x6f000 },
+ [GCC_PCIE_PHY_COM_BCR] = { 0x6f014 },
+ [GCC_PCIE_PHY_COM_NOCSR_BCR] = { 0x6f00c },
[GCC_DCD_BCR] = { 0x70000 },
[GCC_OBT_ODT_BCR] = { 0x73000 },
[GCC_UFS_BCR] = { 0x75000 },