diff options
| author | Robert Foss <robert.foss@linaro.org> | 2022-11-02 10:01:40 +0100 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2022-11-06 05:38:19 +0100 |
| commit | f05dbd1a500661a9e3af59f0690301d031140da7 (patch) | |
| tree | 21b3d4b5017a7ea59aa6c229e73ff5cac90fa088 /drivers/clk/qcom | |
| parent | clk: qcom: dispcc-sm8250: Add missing EDP clocks for sm8350 (diff) | |
| download | linux-f05dbd1a500661a9e3af59f0690301d031140da7.tar.xz linux-f05dbd1a500661a9e3af59f0690301d031140da7.zip | |
clk: qcom: dispcc-sm8250: Disable link_div_clk_src for sm8150
SM8150 does not have any of the link_div_clk_src clocks, so
let's disable them for this SoC.
Signed-off-by: Robert Foss <robert.foss@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20221102090140.965450-6-robert.foss@linaro.org
Diffstat (limited to 'drivers/clk/qcom')
| -rw-r--r-- | drivers/clk/qcom/dispcc-sm8250.c | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/drivers/clk/qcom/dispcc-sm8250.c b/drivers/clk/qcom/dispcc-sm8250.c index d2aaa44ed3d4..382dbd8ba250 100644 --- a/drivers/clk/qcom/dispcc-sm8250.c +++ b/drivers/clk/qcom/dispcc-sm8250.c @@ -1289,6 +1289,17 @@ static int disp_cc_sm8250_probe(struct platform_device *pdev) disp_cc_pll1_config.config_ctl_hi1_val = 0x00000024; disp_cc_pll1_config.user_ctl_hi1_val = 0x000000D0; disp_cc_pll1_init.ops = &clk_alpha_pll_trion_ops; + + disp_cc_mdss_dp_link_intf_clk.clkr.hw.init->parent_hws[0] = + &disp_cc_mdss_dp_link_clk_src.clkr.hw; + disp_cc_mdss_dp_link1_intf_clk.clkr.hw.init->parent_hws[0] = + &disp_cc_mdss_dp_link1_clk_src.clkr.hw; + disp_cc_mdss_edp_link_intf_clk.clkr.hw.init->parent_hws[0] = + &disp_cc_mdss_edp_link_clk_src.clkr.hw; + + disp_cc_sm8250_clocks[DISP_CC_MDSS_DP_LINK1_DIV_CLK_SRC] = NULL; + disp_cc_sm8250_clocks[DISP_CC_MDSS_DP_LINK_DIV_CLK_SRC] = NULL; + disp_cc_sm8250_clocks[DISP_CC_MDSS_EDP_LINK_DIV_CLK_SRC] = NULL; } else if (of_device_is_compatible(pdev->dev.of_node, "qcom,sm8350-dispcc")) { static struct clk_rcg2 * const rcgs[] = { &disp_cc_mdss_byte0_clk_src, |