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authorAlex Frid <afrid@nvidia.com>2017-07-25 12:34:15 +0200
committerStephen Boyd <sboyd@codeaurora.org>2017-08-24 01:00:42 +0200
commit7157c69a99510c2234fc0b6001f21776085fda73 (patch)
tree633a37c49cb0bb8320203a0f943fcec86bed93da /drivers/clk/qcom
parentclk: tegra: Correct Tegra210 UTMIPLL poweron delay (diff)
downloadlinux-7157c69a99510c2234fc0b6001f21776085fda73.tar.xz
linux-7157c69a99510c2234fc0b6001f21776085fda73.zip
clk: tegra: Fix Tegra210 PLLU initialization
- Added necessary delays in PLLU enable sequence during initialization - Applied PLLU lock to all secondary gates (PLLU_48M and PLLU_60M were missing). Signed-off-by: Alex Frid <afrid@nvidia.com> Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Acked-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/qcom')
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