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| author | Chris Brandt <chris.brandt@renesas.com> | 2019-12-06 14:41:59 +0100 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2019-12-20 15:03:27 +0100 |
| commit | c9d9d903474c548578237c1fde1e6673d729abe8 (patch) | |
| tree | 57c0ebff04fd96b7b67b8dd1148a0f7428201e36 /drivers/clk/renesas/r7s9210-cpg-mssr.c | |
| parent | clk: renesas: rcar-gen3: Allow changing the RPC[D2] clocks (diff) | |
| download | linux-c9d9d903474c548578237c1fde1e6673d729abe8.tar.xz linux-c9d9d903474c548578237c1fde1e6673d729abe8.zip | |
clk: renesas: r7s9210: Add SPIBSC clock
Add SPIBSC clock for RZ/A2.
Signed-off-by: Chris Brandt <chris.brandt@renesas.com>
Link: https://lore.kernel.org/r/20191206134202.18784-4-chris.brandt@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/r7s9210-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r7s9210-cpg-mssr.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r7s9210-cpg-mssr.c b/drivers/clk/renesas/r7s9210-cpg-mssr.c index cf65d4e0e116..443bff08df4c 100644 --- a/drivers/clk/renesas/r7s9210-cpg-mssr.c +++ b/drivers/clk/renesas/r7s9210-cpg-mssr.c @@ -93,6 +93,7 @@ static const struct mssr_mod_clk r7s9210_mod_clks[] __initconst = { DEF_MOD_STB("ether1", 64, R7S9210_CLK_B), DEF_MOD_STB("ether0", 65, R7S9210_CLK_B), + DEF_MOD_STB("spibsc", 83, R7S9210_CLK_P1), DEF_MOD_STB("i2c3", 84, R7S9210_CLK_P1), DEF_MOD_STB("i2c2", 85, R7S9210_CLK_P1), DEF_MOD_STB("i2c1", 86, R7S9210_CLK_P1), |