diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-12 09:02:33 +0200 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-10-26 12:38:01 +0200 |
| commit | 99c05a2b710f16ea592ccb63ef5fe5f1f6b15db9 (patch) | |
| tree | 469de9ed36f08dd4f87442a36cf304633204a7a6 /drivers/clk/renesas/r8a779f0-cpg-mssr.c | |
| parent | clk: renesas: r9a07g043: Drop WDT2 clock and reset entry (diff) | |
| download | linux-99c05a2b710f16ea592ccb63ef5fe5f1f6b15db9.tar.xz linux-99c05a2b710f16ea592ccb63ef5fe5f1f6b15db9.zip | |
clk: renesas: r8a779f0: Fix SD0H clock name
Correct the misspelled textual name of the SD0H clock.
Fixes: 9b5dd1ff705c6854 ("clk: renesas: r8a779f0: Add SDH0 clock")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/1f682d338f133608f138ae87323707436ad8c748.1665558014.git.geert+renesas@glider.be
Diffstat (limited to 'drivers/clk/renesas/r8a779f0-cpg-mssr.c')
| -rw-r--r-- | drivers/clk/renesas/r8a779f0-cpg-mssr.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/r8a779f0-cpg-mssr.c b/drivers/clk/renesas/r8a779f0-cpg-mssr.c index 304435613723..8e7b9180ec67 100644 --- a/drivers/clk/renesas/r8a779f0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779f0-cpg-mssr.c @@ -113,7 +113,7 @@ static const struct cpg_core_clk r8a779f0_core_clks[] __initconst = { DEF_FIXED("sasyncperd2", R8A779F0_CLK_SASYNCPERD2, R8A779F0_CLK_SASYNCPERD1, 2, 1), DEF_FIXED("sasyncperd4", R8A779F0_CLK_SASYNCPERD4, R8A779F0_CLK_SASYNCPERD1, 4, 1), - DEF_GEN4_SDH("sdh0", R8A779F0_CLK_SD0H, CLK_SDSRC, 0x870), + DEF_GEN4_SDH("sd0h", R8A779F0_CLK_SD0H, CLK_SDSRC, 0x870), DEF_GEN4_SD("sd0", R8A779F0_CLK_SD0, R8A779F0_CLK_SD0H, 0x870), DEF_BASE("rpc", R8A779F0_CLK_RPC, CLK_TYPE_GEN4_RPC, CLK_RPCSRC), |