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author | Wolfram Sang <wsa+renesas@sang-engineering.com> | 2016-03-24 13:50:41 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2016-03-29 09:24:02 +0200 |
commit | ba8c1a81d4b7c22ac2d767265851ad77c4d01002 (patch) | |
tree | 39a18c75b5c901e44d32c599223e6bbaa198d476 /drivers/clk/renesas/renesas-cpg-mssr.h | |
parent | clk: renesas: r8a7795: add PWM clock (diff) | |
download | linux-ba8c1a81d4b7c22ac2d767265851ad77c4d01002.tar.xz linux-ba8c1a81d4b7c22ac2d767265851ad77c4d01002.zip |
clk: renesas: r8a7795: make SD clk definition specific for GEN3
About SD clocks: The clock type is Gen3 specific, the callbacks are all
Gen3 specific; I think the clock definition should also be Gen3 specific
and not in the general header file.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/renesas-cpg-mssr.h')
-rw-r--r-- | drivers/clk/renesas/renesas-cpg-mssr.h | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h index 952b6957233b..cad3c7d1b0c6 100644 --- a/drivers/clk/renesas/renesas-cpg-mssr.h +++ b/drivers/clk/renesas/renesas-cpg-mssr.h @@ -53,9 +53,6 @@ enum clk_types { DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult) #define DEF_DIV6P1(_name, _id, _parent, _offset) \ DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset) -#define DEF_SD(_name, _id, _parent, _offset) \ - DEF_BASE(_name, _id, CLK_TYPE_GEN3_SD, _parent, .offset = _offset) - /* * Definitions of Module Clocks |