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authorClaudiu Beznea <claudiu.beznea.uj@bp.renesas.com>2023-09-12 06:51:30 +0200
committerGeert Uytterhoeven <geert+renesas@glider.be>2023-09-18 10:05:00 +0200
commit17939df3c9acd26e4dac1c5943dd8e58e1bcb4e7 (patch)
tree1514e4da31e2e3ac397de66876fd0eb153264744 /drivers/clk/renesas/rzg2l-cpg.c
parentclk: renesas: r9a06g032: Use for_each_compatible_node() (diff)
downloadlinux-17939df3c9acd26e4dac1c5943dd8e58e1bcb4e7.tar.xz
linux-17939df3c9acd26e4dac1c5943dd8e58e1bcb4e7.zip
clk: renesas: rzg2l: Use core->name for clock name
core->name already contains the clock name thus, there is no need to check the GET_SHIFT(core->conf) to decide on it. Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20230912045157.177966-11-claudiu.beznea.uj@bp.renesas.com Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'drivers/clk/renesas/rzg2l-cpg.c')
-rw-r--r--drivers/clk/renesas/rzg2l-cpg.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/renesas/rzg2l-cpg.c b/drivers/clk/renesas/rzg2l-cpg.c
index 47f488387f33..a1e820d2eb9e 100644
--- a/drivers/clk/renesas/rzg2l-cpg.c
+++ b/drivers/clk/renesas/rzg2l-cpg.c
@@ -265,7 +265,7 @@ rzg2l_cpg_sd_mux_clk_register(const struct cpg_core_clk *core,
clk_hw_data->priv = priv;
clk_hw_data->conf = core->conf;
- init.name = GET_SHIFT(core->conf) ? "sd1" : "sd0";
+ init.name = core->name;
init.ops = &rzg2l_cpg_sd_clk_mux_ops;
init.flags = 0;
init.num_parents = core->num_parents;