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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-11-20 16:46:38 +0100 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2018-12-04 10:30:02 +0100 |
commit | 846dbb405b8cf4b11b8dd5a414d3b01dc20971d8 (patch) | |
tree | 35b9bc552861d45fc7e6288d7958236f2c4520f7 /drivers/clk/renesas | |
parent | clk: renesas: r8a77995: Remove non-existent VIN5-7 module clocks (diff) | |
download | linux-846dbb405b8cf4b11b8dd5a414d3b01dc20971d8.tar.xz linux-846dbb405b8cf4b11b8dd5a414d3b01dc20971d8.zip |
clk: renesas: r8a77995: Remove non-existent SSP clocks
The R-Car Gen3 HardWare Manual Errata for Rev. 0.80 (Dec 22, 2017, and
Feb 28, 2018) removed the SSPSRC, SSP1, and SSP2 clocks on R-Car D3, as
this SoC does not have a Stream and Security Processor.
As these definitions were never used, they can just be removed.
The freed slots in the DT bindings header must not be reused, though.
Fixes: 714c53aa2e2d6d60 ("clk: renesas: Add r8a77995 CPG Core Clock Definitions")
Fixes: d71e851d82c6cfe5 ("clk: renesas: cpg-mssr: Add R8A77995 support")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'drivers/clk/renesas')
-rw-r--r-- | drivers/clk/renesas/r8a77995-cpg-mssr.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/clk/renesas/r8a77995-cpg-mssr.c b/drivers/clk/renesas/r8a77995-cpg-mssr.c index 5cbdabc311f7..f2636a34c96c 100644 --- a/drivers/clk/renesas/r8a77995-cpg-mssr.c +++ b/drivers/clk/renesas/r8a77995-cpg-mssr.c @@ -42,7 +42,6 @@ enum clk_ids { CLK_S2, CLK_S3, CLK_SDSRC, - CLK_SSPSRC, CLK_RINT, CLK_OCO, |