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authorHeiko Stübner <heiko@sntech.de>2014-07-03 01:58:39 +0200
committerMike Turquette <mturquette@linaro.org>2014-07-13 21:17:06 +0200
commita245fecbb8064641d9cc317b347b5bdb2b7a4bb6 (patch)
treed4573cc7258ecc18e9db839f809960062ee419b0 /drivers/clk/rockchip/Makefile
parentclk: composite: improve rate_hw sanity check logic (diff)
downloadlinux-a245fecbb8064641d9cc317b347b5bdb2b7a4bb6.tar.xz
linux-a245fecbb8064641d9cc317b347b5bdb2b7a4bb6.zip
clk: rockchip: add basic infrastructure for clock branches
This adds infrastructure for registering clock branches. On Rockchip SoCs most clock branches are a combination of mux,divider and gate components, thus a composite clock is used when appropriate. Clock branches are supposed to be declared in an array using the COMPOSITE* or MUX, etc makros defined in the header and then registered using rockchip_clk_register_branches. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-By: Max Schwarz <max.schwarz@online.de> Tested-By: Max Schwarz <max.schwarz@online.de> Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'drivers/clk/rockchip/Makefile')
-rw-r--r--drivers/clk/rockchip/Makefile1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/Makefile b/drivers/clk/rockchip/Makefile
index 8d3aefad2e73..0068a8b560b3 100644
--- a/drivers/clk/rockchip/Makefile
+++ b/drivers/clk/rockchip/Makefile
@@ -3,3 +3,4 @@
#
obj-y += clk-rockchip.o
+obj-y += clk.o