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authorChris Zhong <zyw@rock-chips.com>2015-11-26 08:50:16 +0100
committerHeiko Stuebner <heiko@sntech.de>2015-11-26 11:15:23 +0100
commita2f4c560f18edd2ffe0f15d52ce2be55cff605d2 (patch)
tree6c0500076dca05613569aa043fcea88eb7e8c981 /drivers/clk/rockchip/clk-rk3288.c
parentMerge branch 'v4.5-clk/clkids' into v4.5-clk/next (diff)
downloadlinux-a2f4c560f18edd2ffe0f15d52ce2be55cff605d2.tar.xz
linux-a2f4c560f18edd2ffe0f15d52ce2be55cff605d2.zip
clk: rockchip: add mipidsi clock on rk3288
sclk_mipidsi_24m is the gating of mipi dsi phy. Signed-off-by: Chris Zhong <zyw@rock-chips.com> Acked-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip/clk-rk3288.c')
-rw-r--r--drivers/clk/rockchip/clk-rk3288.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index 3fceda14b3dc..80c71a8fa5ca 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -709,7 +709,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS),
GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
- GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
+ GATE(SCLK_MIPIDSI_24M, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
/* sclk_gpu gates */
GATE(ACLK_GPU, "aclk_gpu", "sclk_gpu", 0, RK3288_CLKGATE_CON(18), 0, GFLAGS),