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author | Heiko Stuebner <heiko@sntech.de> | 2016-01-19 10:01:08 +0100 |
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committer | Heiko Stuebner <heiko@sntech.de> | 2016-01-24 23:29:16 +0100 |
commit | 535ebd428aeb07c3327947281306f2943f2c9faa (patch) | |
tree | 91f83de7f76548c303d4098a5ef571aaf9e03292 /drivers/clk/rockchip/clk-rk3368.c | |
parent | clk: rockchip: rk3036: enable the CLK_IGNORE_UNUSED flag for hclk_vio_bus (diff) | |
download | linux-535ebd428aeb07c3327947281306f2943f2c9faa.tar.xz linux-535ebd428aeb07c3327947281306f2943f2c9faa.zip |
clk: rockchip: rk3368: fix cpuclk mux bit of big cpu-cluster
Both clusters have their mux bit in bit 7 of their respective register.
For whatever reason the big cluster currently lists bit 15 which is
definitly wrong.
Fixes: 3536c97a52db ("clk: rockchip: add rk3368 clock controller")
Reported-by: Zhang Qing <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: zhangqing <zhangqing@rock-chips.com>
Cc: stable@vger.kernel.org
Diffstat (limited to 'drivers/clk/rockchip/clk-rk3368.c')
-rw-r--r-- | drivers/clk/rockchip/clk-rk3368.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3368.c b/drivers/clk/rockchip/clk-rk3368.c index be0ede522269..473b36f0830a 100644 --- a/drivers/clk/rockchip/clk-rk3368.c +++ b/drivers/clk/rockchip/clk-rk3368.c @@ -165,7 +165,7 @@ static const struct rockchip_cpuclk_reg_data rk3368_cpuclkb_data = { .core_reg = RK3368_CLKSEL_CON(0), .div_core_shift = 0, .div_core_mask = 0x1f, - .mux_core_shift = 15, + .mux_core_shift = 7, }; static const struct rockchip_cpuclk_reg_data rk3368_cpuclkl_data = { |