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authorJianqun <jay.xu@rock-chips.com>2014-10-20 11:55:03 +0200
committerHeiko Stuebner <heiko@sntech.de>2014-10-20 13:53:56 +0200
commit8f06f5d392b3fbd58a5d7e00b047b6ee08c6d9b0 (patch)
tree5b864a527519ed47be96f419f43a378c2f4b226e /drivers/clk/rockchip/clk.h
parentclk: rockchip: add 400MHz and 500MHz for rk3288 clock rate (diff)
downloadlinux-8f06f5d392b3fbd58a5d7e00b047b6ee08c6d9b0.tar.xz
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clk: rockchip: rk3288: removing the CLK_SET_RATE_PARENT from i2s_clkout
Removing the CLK_SET_RATE_PARENT from i2s_clkout, to limit i2s0_clkout to select between its two parent without being able influence the core i2s clock. Tested on rk3288 board, suggested by Heiko. Signed-off-by: Jianqun <jay.xu@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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