summaryrefslogtreecommitdiffstats
path: root/drivers/clk/rockchip/clk.h
diff options
context:
space:
mode:
authorHeiko Stuebner <heiko@sntech.de>2015-07-05 11:00:14 +0200
committerStephen Boyd <sboyd@codeaurora.org>2015-07-07 00:04:40 +0200
commit8a76f443a9ea6f7f72ede9f95fe0ca5b90f09a43 (patch)
tree3d15fd17c70ea1dd6e43efc55ac78a6fe6842b11 /drivers/clk/rockchip/clk.h
parentclk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant (diff)
downloadlinux-8a76f443a9ea6f7f72ede9f95fe0ca5b90f09a43.tar.xz
linux-8a76f443a9ea6f7f72ede9f95fe0ca5b90f09a43.zip
clk: rockchip: add support for phase inverters
Most Rockchip socs have optional phase inverters connected to some clocks that move the clock-phase by 180 degrees. Signed-off-by: Heiko Stuebner <heiko@sntech.de> [sboyd@codeaurora.org: Dropped lazy part of commit text] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/rockchip/clk.h')
-rw-r--r--drivers/clk/rockchip/clk.h20
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index 501f02ea9d4b..b72dad074a75 100644
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -182,6 +182,13 @@ struct clk *rockchip_clk_register_mmc(const char *name,
const char *const *parent_names, u8 num_parents,
void __iomem *reg, int shift);
+#define ROCKCHIP_INVERTER_HIWORD_MASK BIT(0)
+
+struct clk *rockchip_clk_register_inverter(const char *name,
+ const char *const *parent_names, u8 num_parents,
+ void __iomem *reg, int shift, int flags,
+ spinlock_t *lock);
+
#define PNAME(x) static const char *const x[] __initconst
enum rockchip_clk_branch_type {
@@ -191,6 +198,7 @@ enum rockchip_clk_branch_type {
branch_fraction_divider,
branch_gate,
branch_mmc,
+ branch_inverter,
};
struct rockchip_clk_branch {
@@ -414,6 +422,18 @@ struct rockchip_clk_branch {
.div_shift = shift, \
}
+#define INVERTER(_id, cname, pname, io, is, if) \
+ { \
+ .id = _id, \
+ .branch_type = branch_inverter, \
+ .name = cname, \
+ .parent_names = (const char *[]){ pname }, \
+ .num_parents = 1, \
+ .muxdiv_offset = io, \
+ .div_shift = is, \
+ .div_flags = if, \
+ }
+
void rockchip_clk_init(struct device_node *np, void __iomem *base,
unsigned long nr_clks);
struct regmap *rockchip_clk_get_grf(void);