diff options
| author | Xing Zheng <zhengxing@rock-chips.com> | 2016-03-10 04:47:01 +0100 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2016-03-27 13:03:34 +0200 |
| commit | b40baccd236a9a91fbb077efb8dadb41fdfb55ab (patch) | |
| tree | fc509c8e9614fea595fb285467e606f5a04de850 /drivers/clk/rockchip/clk.h | |
| parent | clk: rockchip: Add support for multiple clock providers (diff) | |
| download | linux-b40baccd236a9a91fbb077efb8dadb41fdfb55ab.tar.xz linux-b40baccd236a9a91fbb077efb8dadb41fdfb55ab.zip | |
clk: rockchip: add new pll-type for rk3399 and similar socs
The rk3399's pll and clock are similar with rk3036's, it different
with base on the rk3066(rk3188, rk3288, rk3368 use it), there are
different adjust foctors and control registers, so these should be
independent and separate from the series of rk3066s.
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'drivers/clk/rockchip/clk.h')
| -rw-r--r-- | drivers/clk/rockchip/clk.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index e243d509da89..4798786703b8 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -96,6 +96,7 @@ struct clk; enum rockchip_pll_type { pll_rk3036, pll_rk3066, + pll_rk3399, }; #define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1, \ @@ -150,7 +151,7 @@ struct rockchip_pll_rate_table { unsigned int nf; unsigned int no; unsigned int nb; - /* for RK3036 */ + /* for RK3036/RK3399 */ unsigned int fbdiv; unsigned int postdiv1; unsigned int refdiv; |